Abstract
IEEE Low-density parity-check (LDPC) codes are normally categorized into random structure or regular structure. In this paper, we introduce a new type of LDPC codes which is of semi-regular style. The parity-check matrices of the new LDPC code type are composed of sub-matrices termed tree-permutation matrices (TPMs). These TPMs are “semi-regular” and are constructed in a systematic way. Using the 2×2 identity matrix and anti-diagonal matrix as an example, we illustrate how 2M×2M TPMs are formed. During the formation of the 2M×2M TPMs, we further apply the hill-climbing algorithm to avoid short cycles. Finally, we construct a girth-8 TPM-LDPC code with a base matrix of size 4×24 and a girth-10 TPM-LDPC code with a base matrix of size 3×10. We implement the TPM-LDPC decoders on a FPGA and compare the simulation results and decoder complexity with other LDPC codes.
Original language | English |
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Journal | IEEE Transactions on Circuits and Systems II: Express Briefs |
DOIs | |
Publication status | Accepted/In press - 20 Dec 2017 |
Keywords
- Complexity theory
- Decoding
- Field programmable gate arrays
- FPGA implementation
- low-density parity-check code
- Parity check codes
- Simulation
- Throughput
- tree-permutation matrix.
ASJC Scopus subject areas
- Electrical and Electronic Engineering