Abstract
Advances in VLSI technology have rendered the implementation of complex operation sequences or transactions inside the body of hardware memory chips a concrete possibility. We show that such an implementation will provide an attractive performance gain and demonstrate the effectiveness through simulation.
Original language | English |
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Pages (from-to) | 1441-1443 |
Number of pages | 3 |
Journal | Electronics Letters |
Volume | 33 |
Issue number | 17 |
Publication status | Published - 14 Aug 1997 |
Keywords
- Integrated memory circuits
- VLSI
ASJC Scopus subject areas
- Electrical and Electronic Engineering