2D semiconductors are promising candidates for future electronic device applications due to their immunity to short-channel effects (SCE), but many issues regarding mobility, contact, interface and power consumption still remain (Fig. 1). We develop a low-field model to calculate the mobility of monolayer MoS
FETs. Guided by the model, high carrier mobility of 150 cm
/Vs and saturation current over 450 μ Aμm are realized in long-channel monolayer MoS
FETs, through a series of interface optimization by high- κ dielectric and thiol chemical treatment. For low-power applications, we demonstrate hysteresis-free MoS
negative capacitance FETs (NCFETs) using ferroelectric HtZrO
(HZO) as gate dielectric, achieving sub-60m V/dec subthreshold slope (SS) over 6 orders of I
, minimum SS of 24 mV/dec and 10
on/off ratio under V dd=0.5 V. We further study the high frequency performance and show that sub-60mV/dec is maintained at least to 10 kHz without signs of degradation. Finally, by performing different gate sweeps we conclude that the steep slope is indeed due to NC effects rather than ferroelectric switching of HZO.