Timing optimization of nested loops considering code size for DSP applications

Keyphrases

• Software pipeline 100%
• Timing Optimization 100%
• Code Size 100%
• DSP Applications 100%
• Nested Loops 100%
• Retiming 80%
• Computation Time 20%
• Parallelization 20%
• Timing Performance 20%
• Parallelizing 20%
• Single Loop 20%
• Execution Sequence 20%
• Outer Loop 20%
• Embedded System Design 20%
• Loop Parallelization 20%
• Loop Nest 20%
• Index Generation 20%
• Computational Code 20%
• Index Codes 20%
• Loop Technique 20%
• Generation Size 20%
• Challenging Problems 20%
• Pipeline Method 20%

Computer Science

• Software Pipelining 100%
• Nested Loop 100%
• Timing Optimization 100%
• Parallelism 40%
• Execution Sequence 20%
• Pipelined Loop 20%
• Experimental Result 20%
• Computation Time 20%
• Embedded System Design 20%