Thermal annealing effect on electrical characteristics of CuPc thin-film transistors on glass with ZrO2as gate dielectric

Wing Man Tang; M. G. Helander; J. Qiu; M. T. Greiner; Z. H. Lu; W. T. Ng

doi:10.1109/EDSSC.2015.7285084

Thermal annealing effect on electrical characteristics of CuPc thin-film transistors on glass with ZrO₂as gate dielectric

Wing Man Tang, M. G. Helander, J. Qiu, M. T. Greiner, Z. H. Lu, W. T. Ng

Research output: Chapter in book / Conference proceeding › Conference article published in proceeding or book › Academic research › peer-review

1 Citation (Scopus)

Abstract

Organic thin film transistors (OTFTs) with ZrO2as gate dielectric have been fabricated on glass substrates. The gate dielectric is annealed in N2at different temperatures to investigate the effects of annealing temperatures on the performance of the OTFTs. The devices show low threshold voltage and small subthreshold slope, and thus are suitable for low-voltage and low-power applications. It is also found that raising the annealing temperature can initially enhance the electrical properties of OTFTs. This is attributed to the improved dielectric and interface quality by the thermal annealing treatment. ZrO2annealed at 150 °C, 250 °C and 350 °C can lower the maximum density of surface states by 8 %, 32 % and 42 % respectively. Further increasing the annealing temperature to 550 °C is found to degrade the device performance. Among the studied devices, OTFTs with ZrO2annealed at 350 °C exhibits the best device performance, such as a small threshold voltage of -0.89 V and a low sub-threshold slope of 1.05 V/decade.

Original language	English
Title of host publication	Proceedings of the 2015 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015
Publisher	IEEE
Pages	197-200
Number of pages	4
ISBN (Electronic)	9781479983636
DOIs	https://doi.org/10.1109/EDSSC.2015.7285084
Publication status	Published - 30 Sept 2015
Event	11th IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015 - Nanyang Executive Center (NEC), Singapore, Singapore Duration: 1 Jun 2015 → 4 Jun 2015

Conference

Conference	11th IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015
Country/Territory	Singapore
City	Singapore
Period	1/06/15 → 4/06/15

Keywords

CuPc
High-k dielectric ZrO 2
OTFT
Thermal annealing

ASJC Scopus subject areas

Electrical and Electronic Engineering

More information

10.1109/EDSSC.2015.7285084

Cite this

Tang, W. M., Helander, M. G., Qiu, J., Greiner, M. T., Lu, Z. H., & Ng, W. T. (2015). Thermal annealing effect on electrical characteristics of CuPc thin-film transistors on glass with ZrO₂as gate dielectric. In Proceedings of the 2015 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015 (pp. 197-200). Article 7285084 IEEE. https://doi.org/10.1109/EDSSC.2015.7285084

@inproceedings{3ad8d92d87f34ec080cef6264319539e,

title = "Thermal annealing effect on electrical characteristics of CuPc thin-film transistors on glass with ZrO2as gate dielectric",

abstract = "Organic thin film transistors (OTFTs) with ZrO2as gate dielectric have been fabricated on glass substrates. The gate dielectric is annealed in N2at different temperatures to investigate the effects of annealing temperatures on the performance of the OTFTs. The devices show low threshold voltage and small subthreshold slope, and thus are suitable for low-voltage and low-power applications. It is also found that raising the annealing temperature can initially enhance the electrical properties of OTFTs. This is attributed to the improved dielectric and interface quality by the thermal annealing treatment. ZrO2annealed at 150 °C, 250 °C and 350 °C can lower the maximum density of surface states by 8 %, 32 % and 42 % respectively. Further increasing the annealing temperature to 550 °C is found to degrade the device performance. Among the studied devices, OTFTs with ZrO2annealed at 350 °C exhibits the best device performance, such as a small threshold voltage of -0.89 V and a low sub-threshold slope of 1.05 V/decade.",

keywords = "CuPc, High-k dielectric ZrO 2, OTFT, Thermal annealing",

author = "Tang, {Wing Man} and Helander, {M. G.} and J. Qiu and Greiner, {M. T.} and Lu, {Z. H.} and Ng, {W. T.}",

year = "2015",

month = sep,

day = "30",

doi = "10.1109/EDSSC.2015.7285084",

language = "English",

pages = "197--200",

booktitle = "Proceedings of the 2015 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015",

publisher = "IEEE",

address = "United States",

note = "11th IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015 ; Conference date: 01-06-2015 Through 04-06-2015",

}

Tang, WM, Helander, MG, Qiu, J, Greiner, MT, Lu, ZH & Ng, WT 2015, Thermal annealing effect on electrical characteristics of CuPc thin-film transistors on glass with ZrO₂as gate dielectric. in Proceedings of the 2015 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015., 7285084, IEEE, pp. 197-200, 11th IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015, Singapore, Singapore, 1/06/15. https://doi.org/10.1109/EDSSC.2015.7285084

Thermal annealing effect on electrical characteristics of CuPc thin-film transistors on glass with ZrO₂as gate dielectric. / Tang, Wing Man; Helander, M. G.; Qiu, J. et al.
Proceedings of the 2015 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015. IEEE, 2015. p. 197-200 7285084.

Research output: Chapter in book / Conference proceeding › Conference article published in proceeding or book › Academic research › peer-review

TY - GEN

T1 - Thermal annealing effect on electrical characteristics of CuPc thin-film transistors on glass with ZrO2as gate dielectric

AU - Tang, Wing Man

AU - Helander, M. G.

AU - Qiu, J.

AU - Greiner, M. T.

AU - Lu, Z. H.

AU - Ng, W. T.

PY - 2015/9/30

Y1 - 2015/9/30

N2 - Organic thin film transistors (OTFTs) with ZrO2as gate dielectric have been fabricated on glass substrates. The gate dielectric is annealed in N2at different temperatures to investigate the effects of annealing temperatures on the performance of the OTFTs. The devices show low threshold voltage and small subthreshold slope, and thus are suitable for low-voltage and low-power applications. It is also found that raising the annealing temperature can initially enhance the electrical properties of OTFTs. This is attributed to the improved dielectric and interface quality by the thermal annealing treatment. ZrO2annealed at 150 °C, 250 °C and 350 °C can lower the maximum density of surface states by 8 %, 32 % and 42 % respectively. Further increasing the annealing temperature to 550 °C is found to degrade the device performance. Among the studied devices, OTFTs with ZrO2annealed at 350 °C exhibits the best device performance, such as a small threshold voltage of -0.89 V and a low sub-threshold slope of 1.05 V/decade.

AB - Organic thin film transistors (OTFTs) with ZrO2as gate dielectric have been fabricated on glass substrates. The gate dielectric is annealed in N2at different temperatures to investigate the effects of annealing temperatures on the performance of the OTFTs. The devices show low threshold voltage and small subthreshold slope, and thus are suitable for low-voltage and low-power applications. It is also found that raising the annealing temperature can initially enhance the electrical properties of OTFTs. This is attributed to the improved dielectric and interface quality by the thermal annealing treatment. ZrO2annealed at 150 °C, 250 °C and 350 °C can lower the maximum density of surface states by 8 %, 32 % and 42 % respectively. Further increasing the annealing temperature to 550 °C is found to degrade the device performance. Among the studied devices, OTFTs with ZrO2annealed at 350 °C exhibits the best device performance, such as a small threshold voltage of -0.89 V and a low sub-threshold slope of 1.05 V/decade.

KW - CuPc

KW - High-k dielectric ZrO 2

KW - OTFT

KW - Thermal annealing

UR - http://www.scopus.com/inward/record.url?scp=84962150127&partnerID=8YFLogxK

U2 - 10.1109/EDSSC.2015.7285084

DO - 10.1109/EDSSC.2015.7285084

M3 - Conference article published in proceeding or book

SP - 197

EP - 200

BT - Proceedings of the 2015 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015

PB - IEEE

T2 - 11th IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2015

Y2 - 1 June 2015 through 4 June 2015

ER -