The design and evaluation of a selective way based trace cache

Deze Zeng, Minyi Guo, Song Guo, Mianxiong Dong, Hai Jin

Research output: Chapter in book / Conference proceedingConference article published in proceeding or bookAcademic researchpeer-review

1 Citation (Scopus)

Abstract

Energy efficient and performance efficient instruction fetch unit is a critical issue in modern processor design. Trace cache which stores dynamic basic-block stream can significantly improve performance efficiency. Conventional trace cache (CTC) usually adopts set associative structure which requires probing all the data ways in parallel such that only the output of the matched way is used, but the energy for accessing the other ways is wasted. In this paper, we propose a selective way based trace cache (SWTC), which probes only the selected way(s) instead of probing all the data ways. In SWTC, traces are divided into several types and stored into cache by type. Then the trace cache is partially activated and accessed. Based on these design principles, a SWTC model is proposed and evaluated in this paper. Simulation results show that compared to CTC, SWTC can reduce energy consumption on the fetch unit by 20.1% on average, while providing almost the same performance in terms of number of instructions per cycle.
Original languageEnglish
Title of host publicationAdvanced Parallel Processing Technologies - 8th International Symposium, APPT 2009, Proceedings
Pages95-109
Number of pages15
DOIs
Publication statusPublished - 9 Nov 2009
Externally publishedYes
Event8th International Symposium on Advanced Parallel Processing Technologies, APPT 2009 - Rapperswil, Switzerland
Duration: 24 Aug 200925 Aug 2009

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume5737 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Conference

Conference8th International Symposium on Advanced Parallel Processing Technologies, APPT 2009
Country/TerritorySwitzerland
CityRapperswil
Period24/08/0925/08/09

Keywords

  • Computer architecture
  • Energy efficient
  • Instruction fetch unit design
  • Selective way
  • Trace cache

ASJC Scopus subject areas

  • Theoretical Computer Science
  • Computer Science(all)

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