Abstract
On-chip communication is the bottleneck of system performance for NoC-based MPSoCs. SMART, a recently proposed NoC architecture, enables single-cycle multi-hop communications. In SMART NoCs, unconflicted messages can go through an express bypass and the communication efficiency is significantly improved, while conflicted messages have to be buffered for guaranteed delivery with extra delays. Therefore, that performance of SMART NoC may be seriously degraded when communication contention increases. In this paper, we present task mapping techniques to address this problem for SMART NoCs, with the consideration of communication contention, rather than inter-processor distance, by minimizing conflicts and thus maximizing bypass utilization. We first model the entire problem by ILP formulations to find the theoretically optimal solution, and further propose polynomial-Time algorithms for contention-Aware task mapping and message priority assignment. Communicating tasks can be mapped to distant processors in SMART NoCs as long as conflict-free communication paths can be established and bypass can be enabled. Evaluation results on real benchmarks show an average of 44.1% and 32.8% improvement in communication efficiency and application performance compared to state-of-The-Art techniques. The proposed heuristic algorithms only introduce 1.9% performance difference compared to the ILP model and are more scalable to large-size NoCs.
Original language | English |
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Title of host publication | Proceedings of the 54th Annual Design Automation Conference 2017, DAC 2017 |
Publisher | IEEE |
Volume | Part 128280 |
ISBN (Electronic) | 9781450349277 |
DOIs | |
Publication status | Published - 18 Jun 2017 |
Event | 54th Annual Design Automation Conference, DAC 2017 - Austin, United States Duration: 18 Jun 2017 → 22 Jun 2017 |
Conference
Conference | 54th Annual Design Automation Conference, DAC 2017 |
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Country/Territory | United States |
City | Austin |
Period | 18/06/17 → 22/06/17 |
ASJC Scopus subject areas
- Computer Science Applications
- Control and Systems Engineering
- Electrical and Electronic Engineering
- Modelling and Simulation