Study on failure mode of solder bump fabricated using eutectic solder electroplating process

Guo Wei Xiao, Philip Ching Ho Chan, Annette Teng, Jian Cai, Matthew M.F. Yuen

Research output: Chapter in book / Conference proceedingConference article published in proceeding or bookAcademic researchpeer-review

2 Citations (Scopus)


The electroplating-based flip chip process has many advantages over other solder bumping methods, while the bump fabrication process can affect the reliability of solder joints. In this paper, the effect of the UBM and electroplating process of solder bump on the shear strength of solder bump is studied as well as the relationship between the shear test failure mode and solder bump fabrication process. It is reported that the Cu surface roughness is affect by the Cu plating current density and the proper current density is from 10∼40mA/cm2. The temperature of solder bump plating process should be within 30-35°C. It is observed that the growth kinetics of intermetallic compound formation is affected by the Cu stud structure. The ratios of Cu3Sn to the total Cu-Sn IMC layer thickness was from 0.5 to 0.15 with various Cu microstructures at 150°C during thermal aging test. The activation energy was in the range of 0.78ev to 1.14ev. Five failure modes of shear test are analyzed which are related to the electroplating process.
Original languageEnglish
Title of host publicationInternational Symposium on Electronic Materials and Packaging, EMAP 2000
Number of pages9
ISBN (Electronic)0780366549, 9780780366541
Publication statusPublished - 1 Jan 2000
Externally publishedYes
EventInternational Symposium on Electronic Materials and Packaging, EMAP 2000 - Hong Kong, Hong Kong
Duration: 30 Nov 20002 Dec 2000


ConferenceInternational Symposium on Electronic Materials and Packaging, EMAP 2000
Country/TerritoryHong Kong
CityHong Kong


  • Electroplating
  • Flip-chip
  • Growth kinetics
  • Intermetallic compound
  • Reliability
  • Solder bump

ASJC Scopus subject areas

  • Engineering(all)

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