Abstract
Low-density-parity-check (LDPC) codes have aroused much research interest because of their excellent bit error performance. The behaviour of the iterative LDPC decoders, however, has not been fully investigated at all signal-to-noise ratios (SNRs). By considering the LDPC decoders as high-dimensional nonlinear dynamical systems, we attempt to study the corresponding phase trajectories at different SNR values. By having an in-depth understanding of the decoder behaviour, engineers should be able to design more effective and efficient decoders.
Original language | English |
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Title of host publication | Proceedings of the 2005 European Conference on Circuit Theory and Design |
Pages | 157-160 |
Number of pages | 4 |
Volume | 2 |
DOIs | |
Publication status | Published - 1 Dec 2005 |
Event | 2005 European Conference on Circuit Theory and Design - Cork, Ireland Duration: 28 Aug 2005 → 2 Sep 2005 |
Conference
Conference | 2005 European Conference on Circuit Theory and Design |
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Country/Territory | Ireland |
City | Cork |
Period | 28/08/05 → 2/09/05 |
ASJC Scopus subject areas
- Engineering(all)