Stability of a circuit with parasitic capacitances

S. W. Ng, Y. S. Lee, Chi Kong Tse, Siu Chung Wong

Research output: Journal article publicationConference articleAcademic researchpeer-review

Abstract

A novel algorithm which is based on the linear programming technique is proposed to test the stability property of a circuit. This algorithm is efficient and non-Lyapunov equation based. Parasitic capacitances which may de-stabilize a circuit can be located.
Original languageEnglish
Pages (from-to)113-116
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume1
Publication statusPublished - 1 Jan 1995
EventProceedings of the 1995 IEEE International Symposium on Circuits and Systems-ISCAS 95. Part 3 (of 3) - Seattle, WA, United States
Duration: 30 Apr 19953 May 1995

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Electronic, Optical and Magnetic Materials

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