Reduced Worst-Case Communication Latency Using Single-Cycle Multi-Hop Traversal Network-on-Chip

Peng Chen, Weichen Liu, Hui Chen, Shiqing Li, Mengquan Li, Lei Yang, Nan Guan

Research output: Journal article publicationJournal articleAcademic researchpeer-review

1 Citation (Scopus)

Abstract

The communication latency in traditional Network-on-Chip (NoC) with hop-by-hop traversal is inherently restricted by the distance between source-destination communicating pairs. SMART, as one of the dynamically reconfigurable NoC architectures, enables the new feature of single-cycle long-distance communication by building a direct bypass path between distant cores dynamically at runtime. With the increasing of the number of integrated cores in multi/many-core systems, SMART has been deemed a promising communication backbone in such systems. However, SMART is generally optimized for average-case performance for best-effort traffics, not offering real-time guaranteed services for real-time traffics, and thus SMART often shows extremely poor real-time performance (e.g. schedulability). To make SMART latency-predictable for real-time traffics, by combining with the single-cycle bypass forwarding technique, in this paper, we firstly propose a priority-preemptive scheduling to allow contending packets to be arbitrated according to predefined priorities. Based on the priority-based scheduling, for the real-time packet flows with given flow mapping and predefined priorities, we then propose a real-time communication analysis model, by considering shared virtual channels (or priority levels) and arbitrary-deadline real-time packet flows, to predict the worst-case communication latency and validate the schedulability. Through theoretical and experimental comparison, the worst-case communication latency of the analyzed packet flows is reduced significantly compared with that of the traditional priority-preemptive NoCs with hop-by-hop traversal and the original distance-based SMART, thus improving the schedulability.

Original languageEnglish
Pages (from-to)1381-1394
Number of pages14
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
DOIs
Publication statusAccepted/In press - 2020

Keywords

  • Analytical models
  • arbitrary deadline
  • Complexity theory
  • priority-preemptive communication scheduling
  • priority/VC share
  • real-time communication analysis
  • Real-time systems
  • Resource management
  • Scheduling
  • SHARP NoC
  • Spread spectrum communication
  • Switches
  • worst-case end-to-end latency.

ASJC Scopus subject areas

  • Software
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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