Real-time loop scheduling with leakage energy minimization for embedded VLIW DSP processors

Meng Wang; Zili Shao; Chun Jason Xue; Edwin H.M. Sha

doi:10.1109/RTCSA.2007.60

Real-time loop scheduling with leakage energy minimization for embedded VLIW DSP processors

Meng Wang, Zili Shao, Chun Jason Xue, Edwin H.M. Sha

Research output: Chapter in book / Conference proceeding › Conference article published in proceeding or book › Academic research › peer-review

5 Citations (Scopus)

Abstract

In this paper, we develop a novel real-time instruction-level loop scheduling technique to reduce leakage energy consumption for applications with loops on VLIW architecture. We first prove that the scheduling problem with the minimum leakage energy consumption within a timing constraint is NP-complete. Then, LEMLS (Leakage Energy Minimization Loop Scheduling) algorithm is designed to repeatedly regroup a loop based on rotation scheduling [3], and decrease leakage energy integrating with leakage power reduction mechanism. We conduct experiments on a set of DSP benchmarks based on the power model of the VLIW processors in [12]. The results show that our algorithm achieves significant leakage energy saving compared with list scheduling and the algorithm in [19].

Original language	English
Title of host publication	Proceedings - 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2007
Pages	12-19
Number of pages	8
DOIs	https://doi.org/10.1109/RTCSA.2007.60
Publication status	Published - 1 Dec 2007
Event	4296821 - Daegu, Korea, Republic of Duration: 21 Aug 2007 → 24 Aug 2007

Conference

Conference	4296821
Country/Territory	Korea, Republic of
City	Daegu
Period	21/08/07 → 24/08/07

ASJC Scopus subject areas

Computer Science Applications
Control and Systems Engineering
Electrical and Electronic Engineering

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

More information

10.1109/RTCSA.2007.60

Cite this

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title = "Real-time loop scheduling with leakage energy minimization for embedded VLIW DSP processors",

abstract = "In this paper, we develop a novel real-time instruction-level loop scheduling technique to reduce leakage energy consumption for applications with loops on VLIW architecture. We first prove that the scheduling problem with the minimum leakage energy consumption within a timing constraint is NP-complete. Then, LEMLS (Leakage Energy Minimization Loop Scheduling) algorithm is designed to repeatedly regroup a loop based on rotation scheduling [3], and decrease leakage energy integrating with leakage power reduction mechanism. We conduct experiments on a set of DSP benchmarks based on the power model of the VLIW processors in [12]. The results show that our algorithm achieves significant leakage energy saving compared with list scheduling and the algorithm in [19].",

author = "Meng Wang and Zili Shao and Xue, \{Chun Jason\} and Sha, \{Edwin H.M.\}",

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doi = "10.1109/RTCSA.2007.60",

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Real-time loop scheduling with leakage energy minimization for embedded VLIW DSP processors. / Wang, Meng; Shao, Zili; Xue, Chun Jason et al.
Proceedings - 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2007. 2007. p. 12-19 4296831.

Research output: Chapter in book / Conference proceeding › Conference article published in proceeding or book › Academic research › peer-review

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N2 - In this paper, we develop a novel real-time instruction-level loop scheduling technique to reduce leakage energy consumption for applications with loops on VLIW architecture. We first prove that the scheduling problem with the minimum leakage energy consumption within a timing constraint is NP-complete. Then, LEMLS (Leakage Energy Minimization Loop Scheduling) algorithm is designed to repeatedly regroup a loop based on rotation scheduling [3], and decrease leakage energy integrating with leakage power reduction mechanism. We conduct experiments on a set of DSP benchmarks based on the power model of the VLIW processors in [12]. The results show that our algorithm achieves significant leakage energy saving compared with list scheduling and the algorithm in [19].

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BT - Proceedings - 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2007

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Real-time loop scheduling with leakage energy minimization for embedded VLIW DSP processors

Abstract

Conference

ASJC Scopus subject areas

UN SDGs

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