Real-time loop scheduling with leakage energy minimization for embedded VLIW DSP processors

Meng Wang, Zili Shao, Chun Jason Xue, Edwin H.M. Sha

Research output: Chapter in book / Conference proceedingConference article published in proceeding or bookAcademic researchpeer-review

5 Citations (Scopus)

Abstract

In this paper, we develop a novel real-time instruction-level loop scheduling technique to reduce leakage energy consumption for applications with loops on VLIW architecture. We first prove that the scheduling problem with the minimum leakage energy consumption within a timing constraint is NP-complete. Then, LEMLS (Leakage Energy Minimization Loop Scheduling) algorithm is designed to repeatedly regroup a loop based on rotation scheduling [3], and decrease leakage energy integrating with leakage power reduction mechanism. We conduct experiments on a set of DSP benchmarks based on the power model of the VLIW processors in [12]. The results show that our algorithm achieves significant leakage energy saving compared with list scheduling and the algorithm in [19].
Original languageEnglish
Title of host publicationProceedings - 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, RTCSA 2007
Pages12-19
Number of pages8
DOIs
Publication statusPublished - 1 Dec 2007
Event4296821 - Daegu, Korea, Republic of
Duration: 21 Aug 200724 Aug 2007

Conference

Conference4296821
Country/TerritoryKorea, Republic of
CityDaegu
Period21/08/0724/08/07

ASJC Scopus subject areas

  • Computer Science Applications
  • Control and Systems Engineering
  • Electrical and Electronic Engineering

Fingerprint

Dive into the research topics of 'Real-time loop scheduling with leakage energy minimization for embedded VLIW DSP processors'. Together they form a unique fingerprint.

Cite this