Real-Time Dynamic Voltage Loop Scheduling for Multi-Core Embedded Systems

Zili Shao, Meng Wang, Edwin H.M. Sha

Research output: Journal article publicationJournal articleAcademic researchpeer-review

94 Citations (Scopus)


In this brief, we propose a novel real-time loop-scheduling technique to minimize energy consumption via dynamic voltage scaling (DVS) for applications with loops considering transition overhead. One algorithm, dynamic voltage loop scheduling (DVLS), is designed integrating with DVS. In DVLS, we repeatedly regroup a loop based on rotation scheduling and decrease the energy by DVS as much as possible within a timing constraint. We conduct the experiments on a set of digital signal processing benchmarks. The experimental results show that DVLS achieves big energy saving compared with the traditional time-performance-oriented scheduling algorithm.
Original languageEnglish
Pages (from-to)445-449
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Issue number5
Publication statusPublished - 7 May 2007


  • Dynamic voltage scaling (DVS)
  • embedded systems
  • loop
  • multicore
  • real-time
  • scheduling

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


Dive into the research topics of 'Real-Time Dynamic Voltage Loop Scheduling for Multi-Core Embedded Systems'. Together they form a unique fingerprint.

Cite this