Optimizing PCB assembly for family setup strategy

Yongzhong Wu, Ping Ji, William Ho

Research output: Journal article publicationJournal articleAcademic researchpeer-review

2 Citations (Scopus)

Abstract

Purpose - The purpose of this paper is to investigate the optimization for a placement machine in printed circuit board (PCB) assembly when family setup strategy is adopted. Design/methodology/approach - A complete mathematical model is developed for the integrated problem to optimize feeder arrangement and component placement sequences so as to minimize the makespan for a set of PCB batches. Owing to the complexity of the problem, a specific genetic algorithm (GA) is proposed. Findings - The established model is able to find the minimal makespan for a set of PCB batches through determining the feeder arrangement and placement sequences. However, exact solutions to the problem are not practical due to the complexity. Experimental tests show that the proposed GA can solve the problem both effectively and efficiently. Research limitations/implications - When a placement machine is set up for production of a set of PCB batches, the feeder arrangement of the machine together with the component placement sequencing for each PCB type should be solved simultaneously so as to minimize the overall makespan. Practical implications - The paper investigates the optimization for PCB assembly with family setup strategy, which is adopted by many PCB manufacturers for reducing both setup costs and human errors. Originality/value - The paper investigates the feeder arrangement and placement sequencing problems when family setup strategy is adopted, which has not been studied in the literature.
Original languageEnglish
Pages (from-to)61-67
Number of pages7
JournalAssembly Automation
Volume29
Issue number1
DOIs
Publication statusPublished - 28 Jul 2009

Keywords

  • Assembly
  • Printed circuits
  • Process efficiency
  • Process planning

ASJC Scopus subject areas

  • Control and Systems Engineering
  • Industrial and Manufacturing Engineering

Cite this