Abstract
Software pipelining and unfolding are commonly used techniques to increase parallelism for DSP applications. However, these techniques expand the code size of the application significantly. For most DSP systems with limited memory resources, code size becomes one of the most critical concerns for the high-performance applications. In this paper, we present the code size reduction theory based on retiming and unfolding concepts. We propose a code size reduction framework to achieve the optimal code size of software-pipelined and unfolded loops by using conditional registers. The experimental results on several well-know benchmarks show the effectiveness of our code size reduction technique in controlling the code size of optimized loops.
Original language | English |
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Pages (from-to) | 144-149 |
Number of pages | 6 |
Journal | Proceedings of the International Symposium on System Synthesis |
Publication status | Published - 1 Dec 2002 |
Externally published | Yes |
Event | 15th International Symposium on System Synthesis - Kyoto, Japan Duration: 2 Oct 2002 → 4 Oct 2002 |
Keywords
- Retiming
- Rotation scheduling
- Software pipelining
- Unfolding
ASJC Scopus subject areas
- Hardware and Architecture