A general methodology of directly measuring parasitic capacitance using an LCR meter in devices with more than two terminals is discussed. It is concluded that the accuracy of the measurement cannot be guaranteed in such devices since it is dependent on the internal structure of the device. This is demonstrated using the conventional (bulk silicon) MOSFET structure, showing that substrate or well resistance could be the dominant factor limiting measurement accuracy of parasitic capacitances, such as gate-to-drain (source), drain-to-source, drain (source)-to-substrate (well) capacitances. We also conclude that for the silicon-on-insulator (SOI) MOSFET structure, a direct and accurate measurement is difficult to achieve, since the measurement accuracy is impeded by the floating substrate in the structure.
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Electronic, Optical and Magnetic Materials
- Physics and Astronomy (miscellaneous)