On reducing hidden redundant memory accesses for DSP applications

Meng Wang, Zili Shao, Jingling Xue

Research output: Journal article publicationJournal articleAcademic researchpeer-review

1 Citation (Scopus)

Abstract

Reducing memory accesses is particularly important for digital signal processing (DSP) applications since they are widely used in embedded systems and need to be executed with high performance and low power consumption. In this paper, we propose a machine-independent loop memory access optimization technique, redundant load exploration and migration (REALM), to explore hidden redundant load operations and migrate them outside loops based on loop-carried data dependence analysis. We implement REALM into IMPACT and Trimaran. To the best of our knowledge, this is the first work to implement the memory access reduction with loop-carried data reuse in real world compilers. We conduct experiments using a set of benchmarks from DSPstone and MiBench on the cycle-accurate VLIW simulator of Trimaran. The experimental results show that our technique significantly reduces the number of memory accesses.
Original languageEnglish
Article number5451148
Pages (from-to)997-1010
Number of pages14
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume19
Issue number6
DOIs
Publication statusPublished - 1 Jun 2011

Keywords

  • Digital signal processing (DSP) applications
  • instruction scheduling
  • loop optimization
  • memory optimization

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

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