Abstract
Reducing memory accesses is particularly important for digital signal processing (DSP) applications since they are widely used in embedded systems and need to be executed with high performance and low power consumption. In this paper, we propose a machine-independent loop memory access optimization technique, redundant load exploration and migration (REALM), to explore hidden redundant load operations and migrate them outside loops based on loop-carried data dependence analysis. We implement REALM into IMPACT and Trimaran. To the best of our knowledge, this is the first work to implement the memory access reduction with loop-carried data reuse in real world compilers. We conduct experiments using a set of benchmarks from DSPstone and MiBench on the cycle-accurate VLIW simulator of Trimaran. The experimental results show that our technique significantly reduces the number of memory accesses.
Original language | English |
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Article number | 5451148 |
Pages (from-to) | 997-1010 |
Number of pages | 14 |
Journal | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Volume | 19 |
Issue number | 6 |
DOIs | |
Publication status | Published - 1 Jun 2011 |
Keywords
- Digital signal processing (DSP) applications
- instruction scheduling
- loop optimization
- memory optimization
ASJC Scopus subject areas
- Software
- Hardware and Architecture
- Electrical and Electronic Engineering