TY - GEN
T1 - Low-voltage high driving capability CMOS buffer used in MEMS interface circuits
AU - Ha, Yajun
AU - Li, M. F.
AU - Liu, Ai Qun
N1 - Publisher Copyright:
© 1999 IEEE.
PY - 1999/9
Y1 - 1999/9
N2 - A class-AB low voltage high driving capability CMOS buffer amplifier using improved quasi-complementary output stage and error amplifiers with adaptive loads is developed. Improved quasi-complementary output stage makes it more suitable for low voltage applications, while adaptive load in error amplifier is used to increase the driving capability and reduce the sensitivity of the quiescent current to process variation. The circuit has been fabricated in 0.8 μm CMOS process. With 300 Ω load in a ± 1.5 V supply, its output swing is 2.42 V. The mean value of quiescent current for eight samples is 204 μA, with the worst deviation of 17%.
AB - A class-AB low voltage high driving capability CMOS buffer amplifier using improved quasi-complementary output stage and error amplifiers with adaptive loads is developed. Improved quasi-complementary output stage makes it more suitable for low voltage applications, while adaptive load in error amplifier is used to increase the driving capability and reduce the sensitivity of the quiescent current to process variation. The circuit has been fabricated in 0.8 μm CMOS process. With 300 Ω load in a ± 1.5 V supply, its output swing is 2.42 V. The mean value of quiescent current for eight samples is 204 μA, with the worst deviation of 17%.
UR - http://www.scopus.com/inward/record.url?scp=0043199613&partnerID=8YFLogxK
U2 - 10.1109/ICECS.1999.814410
DO - 10.1109/ICECS.1999.814410
M3 - Conference article published in proceeding or book
AN - SCOPUS:0043199613
T3 - Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems
SP - 1313
EP - 1316
BT - Proceedings of ICECS 1999 - 6th IEEE International Conference on Electronics, Circuits and Systems
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 6th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1999
Y2 - 5 September 1999 through 8 September 1999
ER -