Local silicon-gate carbon nanotube field effect transistors using silicon-on-insulator technology

Min Zhang, Philip Ching Ho Chan, Yang Chai, Qi Liang, Z. K. Tang

Research output: Journal article publicationJournal articleAcademic researchpeer-review

14 Citations (Scopus)

Abstract

A local silicon-gate carbon nanotube field effect transistor (CNFET) configuration has been proposed and implemented for integration purpose. By combining the advantages of in situ carbon nanotube growth technology and the silicon-on-insulator technology, we have realized the CNFETs with individual device operation, low parasitic capacitance, high yield fabrication, and better compatibility to the complementary-metal-oxide-semiconductor (CMOS) process. The CNFETs show up-to-date electrical performance. The scaling effect of gate oxide is also explored. This configuration makes CNFET a step closer to the CMOS integrated circuit application.
Original languageEnglish
Article number023116
JournalApplied Physics Letters
Volume89
Issue number2
DOIs
Publication statusPublished - 24 Jul 2006
Externally publishedYes

ASJC Scopus subject areas

  • Physics and Astronomy (miscellaneous)

Cite this