Large-grain polysilicon MOSFET for 3-D integrated circuits

Victor W C Chan, Philip Ching Ho Chan, Mansun Chan

Research output: Chapter in book / Conference proceedingConference article published in proceeding or bookAcademic researchpeer-review

1 Citation (Scopus)


The large-grain polysilicon metal oxide semiconductor field effect transistor (MOSFET) was fabricated for three-dimensional circuits on silicon-on-insulator and bulk wafers. The fabrication of the two layers of complimentary metal oxide semiconductor (CMOS) separated by an insulating layer were discussed. The results showed high performance of CMOS structures and the realization of multi-level in transistors.
Original languageEnglish
Title of host publicationIEEE International SOI Conference
Number of pages2
Publication statusPublished - 1 Dec 2000
Externally publishedYes
Event2000 IEEE International SOI Conference Proceedings - Wakefield, MA, United States
Duration: 1 Dec 2000 → …


Conference2000 IEEE International SOI Conference Proceedings
Country/TerritoryUnited States
CityWakefield, MA
Period1/12/00 → …

ASJC Scopus subject areas

  • Electrical and Electronic Engineering


Dive into the research topics of 'Large-grain polysilicon MOSFET for 3-D integrated circuits'. Together they form a unique fingerprint.

Cite this