Abstract
The large-grain polysilicon metal oxide semiconductor field effect transistor (MOSFET) was fabricated for three-dimensional circuits on silicon-on-insulator and bulk wafers. The fabrication of the two layers of complimentary metal oxide semiconductor (CMOS) separated by an insulating layer were discussed. The results showed high performance of CMOS structures and the realization of multi-level in transistors.
Original language | English |
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Title of host publication | IEEE International SOI Conference |
Publisher | IEEE |
Pages | 22-23 |
Number of pages | 2 |
Publication status | Published - 1 Dec 2000 |
Externally published | Yes |
Event | 2000 IEEE International SOI Conference Proceedings - Wakefield, MA, United States Duration: 1 Dec 2000 → … |
Conference
Conference | 2000 IEEE International SOI Conference Proceedings |
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Country/Territory | United States |
City | Wakefield, MA |
Period | 1/12/00 → … |
ASJC Scopus subject areas
- Electrical and Electronic Engineering