The SOI (Silicon On Insulator) CMOS has many potential advantages over the traditional bulk CMOS circuit as it is free of latch-up and has improved performance and higher packing density [1, 2]. With the recent advances in high-quality thin-film SOI wafer technology, it is becoming a viable technology for ULSI. As SOI emerges as an alternate to bulk CMOS for low power and high-speed applications, an automated methodology will expedite the conversion of existing bulk CMOS designs to SOI CMOS.
|Number of pages||4|
|Journal||Proceedings - IEEE International Symposium on Circuits and Systems|
|Publication status||Published - 1 Jan 1996|
|Event||Proceedings of the 1996 IEEE International Symposium on Circuits and Systems, ISCAS. Part 1 (of 4) - Atlanta, GA, United States|
Duration: 12 May 1996 → 15 May 1996
ASJC Scopus subject areas
- Electrical and Electronic Engineering