Abstract
The impact of non-vertical sidewall on sub-50nm FinFET is studied. The FinFET process transfers the minimum dimension of the device from the gate length to the fin-thickness. It is found that due to the non-uniform fin thickness in the vertical direction, the relationship between current and fin height is more complicated than the anticipated W-to-current relationship.
| Original language | English |
|---|---|
| Title of host publication | IEEE International SOI Conference |
| Pages | 151-152 |
| Number of pages | 2 |
| Publication status | Published - 6 Nov 2003 |
| Externally published | Yes |
| Event | 2003 IEEE International SOI Conference Proceedings - Newport Beach, CA, United States Duration: 29 Sept 2003 → 2 Oct 2003 |
Conference
| Conference | 2003 IEEE International SOI Conference Proceedings |
|---|---|
| Country/Territory | United States |
| City | Newport Beach, CA |
| Period | 29/09/03 → 2/10/03 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering
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