Impact of Non-Vertical Sidewall on Sub-50 nm FinFET

Xusheng Wu, Philip Ching Ho Chan, Mansun Chan

Research output: Chapter in book / Conference proceedingConference article published in proceeding or bookAcademic researchpeer-review

13 Citations (Scopus)

Abstract

The impact of non-vertical sidewall on sub-50nm FinFET is studied. The FinFET process transfers the minimum dimension of the device from the gate length to the fin-thickness. It is found that due to the non-uniform fin thickness in the vertical direction, the relationship between current and fin height is more complicated than the anticipated W-to-current relationship.
Original languageEnglish
Title of host publicationIEEE International SOI Conference
Pages151-152
Number of pages2
Publication statusPublished - 6 Nov 2003
Externally publishedYes
Event2003 IEEE International SOI Conference Proceedings - Newport Beach, CA, United States
Duration: 29 Sep 20032 Oct 2003

Conference

Conference2003 IEEE International SOI Conference Proceedings
CountryUnited States
CityNewport Beach, CA
Period29/09/032/10/03

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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