Impact of Non-Vertical Sidewall on Sub-50 nm FinFET

Xusheng Wu; Philip Ching Ho Chan; Mansun Chan

Impact of Non-Vertical Sidewall on Sub-50 nm FinFET

Xusheng Wu, Philip Ching Ho Chan, Mansun Chan

Research output: Chapter in book / Conference proceeding › Conference article published in proceeding or book › Academic research › peer-review

14 Citations (Scopus)

Abstract

The impact of non-vertical sidewall on sub-50nm FinFET is studied. The FinFET process transfers the minimum dimension of the device from the gate length to the fin-thickness. It is found that due to the non-uniform fin thickness in the vertical direction, the relationship between current and fin height is more complicated than the anticipated W-to-current relationship.

Original language	English
Title of host publication	IEEE International SOI Conference
Pages	151-152
Number of pages	2
Publication status	Published - 6 Nov 2003
Externally published	Yes
Event	2003 IEEE International SOI Conference Proceedings - Newport Beach, CA, United States Duration: 29 Sept 2003 → 2 Oct 2003

Conference

Conference	2003 IEEE International SOI Conference Proceedings
Country/Territory	United States
City	Newport Beach, CA
Period	29/09/03 → 2/10/03

ASJC Scopus subject areas

Electrical and Electronic Engineering

Cite this

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title = "Impact of Non-Vertical Sidewall on Sub-50 nm FinFET",

abstract = "The impact of non-vertical sidewall on sub-50nm FinFET is studied. The FinFET process transfers the minimum dimension of the device from the gate length to the fin-thickness. It is found that due to the non-uniform fin thickness in the vertical direction, the relationship between current and fin height is more complicated than the anticipated W-to-current relationship.",

author = "Xusheng Wu and Chan, {Philip Ching Ho} and Mansun Chan",

year = "2003",

month = nov,

day = "6",

language = "English",

pages = "151--152",

booktitle = "IEEE International SOI Conference",

note = "2003 IEEE International SOI Conference Proceedings ; Conference date: 29-09-2003 Through 02-10-2003",

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TY - GEN

T1 - Impact of Non-Vertical Sidewall on Sub-50 nm FinFET

AU - Wu, Xusheng

AU - Chan, Philip Ching Ho

AU - Chan, Mansun

PY - 2003/11/6

Y1 - 2003/11/6

N2 - The impact of non-vertical sidewall on sub-50nm FinFET is studied. The FinFET process transfers the minimum dimension of the device from the gate length to the fin-thickness. It is found that due to the non-uniform fin thickness in the vertical direction, the relationship between current and fin height is more complicated than the anticipated W-to-current relationship.

AB - The impact of non-vertical sidewall on sub-50nm FinFET is studied. The FinFET process transfers the minimum dimension of the device from the gate length to the fin-thickness. It is found that due to the non-uniform fin thickness in the vertical direction, the relationship between current and fin height is more complicated than the anticipated W-to-current relationship.

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M3 - Conference article published in proceeding or book

SP - 151

EP - 152

BT - IEEE International SOI Conference

T2 - 2003 IEEE International SOI Conference Proceedings

Y2 - 29 September 2003 through 2 October 2003

ER -

Impact of Non-Vertical Sidewall on Sub-50 nm FinFET

Abstract

Conference

ASJC Scopus subject areas

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