Abstract
Loop fusion is commonly used to improve the instruction-level parallelism of loops for high-performance embedded computing systems. Loop fusion, however, is not always directly applicable because the fusion prevention dependencies may exist among loops. Most of the existing techniques still have limitations in fully exploiting the advantages of loop fusion, In this paper, we present a general loop fusion technique for loops or nested loops based on the loop dependency graph model, retiming, and multi-dimensional retiming concepts. We show that any "J+K" model loop can be legally fused using our legalizing fusion technique. Polynomial-time algorithms are developed to solve the loop fusion problem for "J+K" model loops considering both timing and code size of the final code. Our technique produces the final code and calculates the resultant code size directly from the retiming values. The experimental results show that our loop fusion technique always significantly reduces the schedule length.
Original language | English |
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Title of host publication | CASES 2004 |
Subtitle of host publication | International Conference on Compilers, Architecture, and Synthesis for Embedded Systems |
Pages | 190-201 |
Number of pages | 12 |
Publication status | Published - 1 Dec 2004 |
Externally published | Yes |
Event | CASES 2004: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems - Washington, DC, United States Duration: 22 Sept 2004 → 25 Sept 2004 |
Conference
Conference | CASES 2004: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems |
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Country/Territory | United States |
City | Washington, DC |
Period | 22/09/04 → 25/09/04 |
Keywords
- Code size
- Embedded DSP
- Loop Fusion
- Retiming
- Scheduling
ASJC Scopus subject areas
- General Engineering