Abstract
In this paper we report the fully depleted CMOS/SOI device design guidelines for low power applications. Optimal technology, device and circuit parameters are discussed and compared with bulk CMOS based design. The differences and similarities are summarized. We believe this is the first such study to be reported.
Original language | English |
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Title of host publication | International Symposium on Low Power Electronics and Design, Digest of Technical Papers |
Publisher | IEEE |
Pages | 301-304 |
Number of pages | 4 |
Publication status | Published - 1 Jan 1997 |
Externally published | Yes |
Event | Proceedings of the 1997 International Symposium on Low Power Electronics and Design - Monterey, CA, United States Duration: 18 Aug 1997 → 20 Aug 1997 |
Conference
Conference | Proceedings of the 1997 International Symposium on Low Power Electronics and Design |
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Country/Territory | United States |
City | Monterey, CA |
Period | 18/08/97 → 20/08/97 |
ASJC Scopus subject areas
- General Engineering