Abstract
Single tiers of silicon nanowires that bridge the gap between the short sidewalls of silicon-on-insulator (SOI) source/drain pads are formed. The formation of a single tier of bridging nanowires is enabled by the attachment of a single tier of Au catalyst nanoparticles to short SOI sidewalls and the subsequent growth of epitaxial nanowires via the vapor-liquid-solid (VLS) process. The growth of unobstructed nanowire material occurs due to the attachment of catalyst nanoparticles on silicon surfaces and the removal of catalyst nanoparticles from the SOI-buried oxide (BOX). Three-terminal current-voltage measurements of the structure using the substrate as a planar backgate after VLS nanowire growth reveal transistor behaviour characteristics. KGaA.
Original language | English |
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Pages (from-to) | 2440-2444 |
Number of pages | 5 |
Journal | Small |
Volume | 5 |
Issue number | 21 |
DOIs | |
Publication status | Published - 2 Nov 2009 |
Externally published | Yes |
Keywords
- Insulators
- Nanowires
- Silicon
- Transistors
- Vapor-liquid-solid growth
ASJC Scopus subject areas
- Biotechnology
- Biomaterials
- Engineering (miscellaneous)