In the paper, an extended diagonal structure is used efficiently for the address generation of the prime factor algorithm (PFA). This approach is in-place, in-order and requires less temporary storage during the computation. It requires very few modulo operations and no modulo inverse for its computation; these inverses often take up a large memory space for storage in other address generation algorithms. This approach has been implemented using Fortran 77 and the assembly language of the 320C25 DSP. It shows that a maximum of 86% saving in address generation time can be achieved when compared to the conventional approach.
|Number of pages||8|
|Journal||IEE Proceedings, Part G: Circuits, Devices and Systems|
|Publication status||Published - 1 Jan 1991|
ASJC Scopus subject areas