Abstract
The SPICE simulation program is widely used as a brute force simulator for analyzing and designing switching power converters. Results from SPICE are mostly useful, but their integrity is sometimes questionable as erroneous results could be obtained which may not reflect the true behavior of the circuits being simulated. Various parameters in SPICE are crucial in controlling the convergence and accuracy of the simulated results, e.g., relative error tolerance and maximum integration step size. In this paper, we study the system consisting of the SPICE simulation algorithm and the circuit being simulated. Specifically, we describe the generation of flawed solutions in terms of bifurcation of the system under parameter variations. Erroneous results have been collected for different relative error tolerances, maximum integration step sizes, and parasitic inductance and capacitance. These flawed solutions can be analyzed in terms of the manifestation of period-doubling bifurcation and chaotic behavior under variation of selected simulation parameters. This paper provides a systematic approach to rationalizing the behavior of the SPICE simulator, its practical significance being in the identification of the ranges of simulation parameters for which flawed solutions can be produced.
Original language | English |
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Title of host publication | 37th IEEE Power Electronics Specialists Conference 2006, PESC'06 |
DOIs | |
Publication status | Published - 1 Dec 2006 |
Event | 37th IEEE Power Electronics Specialists Conference 2006, PESC'06 - Jeju, Korea, Republic of Duration: 18 Jun 2006 → 22 Jun 2006 |
Conference
Conference | 37th IEEE Power Electronics Specialists Conference 2006, PESC'06 |
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Country/Territory | Korea, Republic of |
City | Jeju |
Period | 18/06/06 → 22/06/06 |
ASJC Scopus subject areas
- Modelling and Simulation
- Condensed Matter Physics
- Energy Engineering and Power Technology
- Electrical and Electronic Engineering