Abstract
Thread-Level Speculation (TLS) has shown great promise as an automatic parallelization technique to achieve high level performance by partitioning a sequential program into threads, which are expected to be optimistically executed in parallel. In this paper, we propose a load-balancing approach to save energy using dynamic voltage scaling. By scaling the voltage of processors running short threads, energy consumption on these processors can be reduced while keeping a similar speedup of the overall system. Two voltage selection strategies have been investigated. With the assistance of some profiling tools, we propose a static voltage selection algorithm that can minimize energy consumption without degrading the parallelism provided by the pure TLS. The other dynamic algorithm selects voltage for each thread with prediction during the execution. Our experimental results show that its energy consumption is reduced to 78.8% and execution time is stretched to 1.07 times, on average, of the pure TLS in a 16-core CMP processor.
Original language | English |
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Title of host publication | 2010 9th International Symposium on Parallel and Distributed Computing, ISPDC 2010 |
Pages | 125-132 |
Number of pages | 8 |
DOIs | |
Publication status | Published - 15 Sept 2010 |
Externally published | Yes |
Event | 9th International Symposium on Parallel and Distributed Computing, ISPDC 2010 - Istanbul, Turkey Duration: 7 Jul 2010 → 9 Jul 2010 |
Conference
Conference | 9th International Symposium on Parallel and Distributed Computing, ISPDC 2010 |
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Country/Territory | Turkey |
City | Istanbul |
Period | 7/07/10 → 9/07/10 |
Keywords
- Dynamic voltage scaling
- Energy efficiency
- Multicore systems
- Thread-level speculation
ASJC Scopus subject areas
- Computational Theory and Mathematics
- Theoretical Computer Science