Energy-efficient H.264 video decoding on VLIW embedded processors

Yu Hu, Qing Li, C. C.Jay Kuo

Research output: Journal article publicationConference articleAcademic researchpeer-review


The energy consumption profiling of the H.264 video decoder on VLIW embedded processors using the Trimaran simulator is conducted. Based on this study, we observe that the branch operations in the quarter-pixel (QP) interpolation and the DCT slow down the issue rate of the VLIW processors. Then, several new instruction architecture sets are proposed to address this issue. These new instructions can be used to speedup the issue rate, and reduce the total energy consumption. Finally, experimental results of the proposed instruction-level power-efficient strategies on the TI C6416 processor are reported and discussed.

Original languageEnglish
Article number02
Pages (from-to)9-20
Number of pages12
JournalProceedings of SPIE - The International Society for Optical Engineering
Publication statusPublished - 21 Jul 2005
Externally publishedYes
EventProceedings of SPIE-IS and T Electronic Imaging - Embedded Processors for Multimedia and Communications II - San Jose, CA, United States
Duration: 17 Jan 200518 Jan 2005


  • Embedded processor
  • Energy optimization
  • H.264
  • VLIW

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Computer Science Applications
  • Applied Mathematics
  • Electrical and Electronic Engineering


Dive into the research topics of 'Energy-efficient H.264 video decoding on VLIW embedded processors'. Together they form a unique fingerprint.

Cite this