Abstract
In this paper, we propose an efficient VLSI architecture for a new three-step search (NTSS) algorithm that is superior to the existing three-step search (TSS) algorithm. By appropriately organizing the checking points into checking-vectors, the regularity of data flow is exploited and the architecture based on 1-D systolic arrays is proposed. Because of the intrinsic characteristic of high-throughput, the proposed architecture can provide efficient solutions for a wide range of video applications.
| Original language | English |
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| Title of host publication | Midwest Symposium on Circuits and Systems |
| Publisher | IEEE |
| Pages | 1228-1231 |
| Number of pages | 4 |
| Publication status | Published - 1 Dec 1995 |
| Externally published | Yes |
| Event | Proceedings of the 1995 IEEE 38th Midwest Symposium on Circuits and Systems. Part 1 (of 2) - Rio de Janeiro, Brazil Duration: 13 Aug 1995 → 16 Aug 1995 |
Conference
| Conference | Proceedings of the 1995 IEEE 38th Midwest Symposium on Circuits and Systems. Part 1 (of 2) |
|---|---|
| Country/Territory | Brazil |
| City | Rio de Janeiro |
| Period | 13/08/95 → 16/08/95 |
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering