Efficient decoding of QC-LDPC codes using GPUs

Yue Zhao, Xu Chen, Chiu Wing Sham, Wai M. Tam, Chung Ming Lau

Research output: Chapter in book / Conference proceedingConference article published in proceeding or bookAcademic researchpeer-review

5 Citations (Scopus)


In this work, we propose an efficient quasi-cyclic LDPC (QC-LDPC) decoder simulator which runs on graphics processing units (GPUs). We optimize the data structures of the messages used in the decoding process such that both the read and write processes can be performed in a highly parallel manner by the GPUs. We also propose a highly efficient algorithm to convert the data structure of the messages from one form to another with very little latency. Finally, with the use of a large number of cores in the GPU to perform the simple computations simultaneously, our GPU-based LDPC decoder is found to run at around 100 times faster than a CPU-based simulator.
Original languageEnglish
Title of host publicationAlgorithms and Architectures for Parallel Processing - 11th International Conference, ICA3PP 2011, Proceedings
Number of pages12
EditionPART 1
Publication statusPublished - 9 Nov 2011
Event11th International Conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2011 - Melbourne, VIC, Australia
Duration: 24 Oct 201126 Oct 2011

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
NumberPART 1
Volume7016 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349


Conference11th International Conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2011
CityMelbourne, VIC


  • Belief propagation
  • CUDA
  • graphics processing unit (GPU)
  • LDPC decoder
  • low-density parity-check codes

ASJC Scopus subject areas

  • Theoretical Computer Science
  • General Computer Science


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