DPA: A data pattern aware error prevention technique for NAND flash lifetime extension

Jie Guo, Zhijie Chen, Danghui Wang, Zili Shao, Yiran Chen

Research output: Chapter in book / Conference proceedingConference article published in proceeding or bookAcademic researchpeer-review

21 Citations (Scopus)

Abstract

The recent research reveals that the bit error rate of a NAND flash cell is highly dependent on the stored data patterns. In this work, we propose Data Pattern Aware (DPA) error protection technique to extend the lifespan of NAND flash based storage systems (NFSS). DPA manipulates the ratio of 1's and 0's in the stored data to minimize occurrence of the data patterns which are susceptible to bit error noise. Consequently, the NAND flash cell bit error rate is reduced, leading to system endurance extension. Our simulation result shows that, with marginal hardware and power overhead, DPA scheme can increase the NFSS lifetime by up to 4×, offering a complementing solution to other lifetime enhancement techniques like wear-leveling.
Original languageEnglish
Title of host publication2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014 - Proceedings
Pages592-597
Number of pages6
DOIs
Publication statusPublished - 27 Mar 2014
Event2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014 - Suntec, Singapore
Duration: 20 Jan 201423 Jan 2014

Conference

Conference2014 19th Asia and South Pacific Design Automation Conference, ASP-DAC 2014
CountrySingapore
CitySuntec
Period20/01/1423/01/14

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design

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