Abstract
NAND flash memory has long been the dominant storage medium in mobile devices. However, power failure may occur at any time and result in loss of important data. Crash recovery therefore becomes vitally important in NAND flash memory storage systems. As flash translation layer (FTL) directly manages flash memory using various metadata, the problem of FTL crash recovery in NAND flash is how to efficiently and effectively maintain and recover the consistency of FTL metadata after system crash. In this paper, we present DCR, a deterministic approach to crash recovery for NAND flash based storage systems. The basic idea is to exploit the determinism of FTL and reproduce events that happened between the last checkpoint and the crash point during crash recovery. Different from existing approaches which have to scan the whole flash memory chip, we show that DCR can recover the system more efficiently by only checking a limited number of blocks based on deterministic FTL operations. We have implemented DCR for a block-level FTL and compared it with a popular version-based scheme using an ARM11-based embedded evaluation board. Experimental results show that DCR can greatly reduce recovery time and guarantee the consistency of FTL metadata after recovery.
Original language | English |
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Title of host publication | DAC 2014 - 51st Design Automation Conference, Conference Proceedings |
Publisher | IEEE |
ISBN (Print) | 9781479930173 |
DOIs | |
Publication status | Published - 1 Jan 2014 |
Event | 51st Annual Design Automation Conference, DAC 2014 - San Francisco, CA, United States Duration: 2 Jun 2014 → 5 Jun 2014 |
Conference
Conference | 51st Annual Design Automation Conference, DAC 2014 |
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Country/Territory | United States |
City | San Francisco, CA |
Period | 2/06/14 → 5/06/14 |
Keywords
- Crash recovery
- NAND flash memory
- Reliability
ASJC Scopus subject areas
- Computer Science Applications
- Control and Systems Engineering
- Electrical and Electronic Engineering
- Modelling and Simulation