Abstract
One of the most challenging problems in high-level synthesis is how to quickly explore a wide range of design options to achieve high-quality designs. This paper presents an Integrated Framework for Design Optimization and Space Minimization (IDOM) towards finding the minimum configuration satisfying timing and code size constraints. We show an effective way to reduce the design space to be explored through the study of the fundamental properties and relations among multiple design parameters, such as retiming value, unfolding factor, timing, and code size. Theoreies are presented to produce a small set of feasible design choices with provable quality. IDOM algorithm is proposed to generate high-quality design by integrating performance and code size optimization techniques. The experimental results on a set of DSP benchmarks show the efficiency and effectiveness of the IDOM algorithm. It constantly generates the minimal configuration for all the benchmarks. The cost of design space exploration using IDOM is only 3% of that using the standard method.
Original language | English |
---|---|
Title of host publication | Hardware/Software Codesign - Proceedings of the International Workshop |
Pages | 144-149 |
Number of pages | 6 |
DOIs | |
Publication status | Published - 1 Dec 2003 |
Externally published | Yes |
Event | First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2003 - Newport Beach, CA, United States Duration: 1 Oct 2003 → 3 Oct 2003 |
Conference
Conference | First IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2003 |
---|---|
Country/Territory | United States |
City | Newport Beach, CA |
Period | 1/10/03 → 3/10/03 |
Keywords
- Code size reduction
- DSP processors
- Retiming
- Unfolding
ASJC Scopus subject areas
- Hardware and Architecture