TY - GEN
T1 - Design and modeling of stable, high Q-factor curved Fabry-Pérot cavities
AU - Malak, Maurine
AU - Bourouina, Tarik
AU - Pavy, Nicolas
AU - Richalot, Elodie
AU - Marty, Frédéric
AU - Liu, Ai Qun
PY - 2010/5
Y1 - 2010/5
N2 - In this paper, we introduce a novel design for high performance silicon-based Fabry-Pérot cavities and its corresponding design model. According to the design model, the new design shows higher stability, lower insertion losses and higher quality factor. Our methodology was based on one hand, on taking advantage of light reflection and refraction over curved surfaces with curvatures along 2 orthogonal directions, in order to confine the Gaussian beam inside the cavity, thus reducing diffraction loss. Such design enables approaching new limits, where Q-factor is governed mainly by the mirrors reflectivity. On the other hand, the use of Bragg reflectors, obtained by DRIE etching enables reaching reflectivities above 99%, thus enabling very high Q-factors.
AB - In this paper, we introduce a novel design for high performance silicon-based Fabry-Pérot cavities and its corresponding design model. According to the design model, the new design shows higher stability, lower insertion losses and higher quality factor. Our methodology was based on one hand, on taking advantage of light reflection and refraction over curved surfaces with curvatures along 2 orthogonal directions, in order to confine the Gaussian beam inside the cavity, thus reducing diffraction loss. Such design enables approaching new limits, where Q-factor is governed mainly by the mirrors reflectivity. On the other hand, the use of Bragg reflectors, obtained by DRIE etching enables reaching reflectivities above 99%, thus enabling very high Q-factors.
UR - http://www.scopus.com/inward/record.url?scp=77957845261&partnerID=8YFLogxK
M3 - Conference article published in proceeding or book
AN - SCOPUS:77957845261
SN - 9782355000119
T3 - Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS, DTIP 2010
SP - 165
EP - 170
BT - Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS, DTIP 2010
T2 - Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS, DTIP 2010
Y2 - 5 May 2010 through 7 May 2010
ER -