Design a novel nine level AC to DC multilevel inverter based on FPGA controllar

Yong Seng Wong; Kuo Bin Liu; Jiann Fuh Chen; Hui Wen Rebecca  Liang

doi:10.1109/PEAC.2014.7038027

Design a novel nine level AC to DC multilevel inverter based on FPGA controllar

Yong Seng Wong
, Kuo Bin Liu
, Jiann Fuh Chen
, Hui Wen Rebecca Liang

The Hong Kong Polytechnic University

Research output: Chapter in book / Conference proceeding › Conference article published in proceeding or book › Academic research › peer-review

Abstract

In this paper, a novel nine level bi-direction multilevel inverter is proposed, The structure of the main concepts for the use eleven power switch devices to divide input voltage that is replace the traditional circuit using by capacitor. Nine switches and four diodes are required to generate a nine-level output. Additional two switches and inductor will generate an output voltages balance circuit to ensure the same voltage on output capacitor. The control scheme is presented by FPGA Spartan605 evaluation kit that is produce eleven level pulse width modulation (PWM) signal pass to power switches. Nine level bi-direction multilevel major advantages for using nine-level PWM are that the voltage of each capacitor device clamping to 1/4 in the dc output voltage. Finally, a 220V_ac 60Hz input voltage and 200V_dc/2kW output nine level inverter will be simulation.

Original language	English
Title of host publication	Proceedings - 2014 International Power Electronics and Application Conference and Exposition, IEEE PEAC 2014
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1177-1180
Number of pages	4
ISBN (Electronic)	9781479967674
DOIs	https://doi.org/10.1109/PEAC.2014.7038027
Publication status	Published - 9 Feb 2014
Event	2014 International Power Electronics and Application Conference and Exposition, IEEE PEAC 2014 - Shanghai, China Duration: 5 Nov 2014 → 8 Nov 2014

Publication series

Name	Proceedings - 2014 International Power Electronics and Application Conference and Exposition, IEEE PEAC 2014

Conference

Conference	2014 International Power Electronics and Application Conference and Exposition, IEEE PEAC 2014
Country/Territory	China
City	Shanghai
Period	5/11/14 → 8/11/14

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

Keywords

FPGA (field programmable gate array)
Multilevel inverter
Voltage balance

ASJC Scopus subject areas

Electrical and Electronic Engineering
Energy Engineering and Power Technology
Renewable Energy, Sustainability and the Environment

More information

10.1109/PEAC.2014.7038027

Cite this

Wong, Y. S., Liu, K. B., Chen, J. F., & Liang, H. W. R. (2014). Design a novel nine level AC to DC multilevel inverter based on FPGA controllar. In Proceedings - 2014 International Power Electronics and Application Conference and Exposition, IEEE PEAC 2014 (pp. 1177-1180). Article 7038027 (Proceedings - 2014 International Power Electronics and Application Conference and Exposition, IEEE PEAC 2014). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/PEAC.2014.7038027

Wong, Yong Seng ; Liu, Kuo Bin ; Chen, Jiann Fuh et al. / Design a novel nine level AC to DC multilevel inverter based on FPGA controllar. Proceedings - 2014 International Power Electronics and Application Conference and Exposition, IEEE PEAC 2014. Institute of Electrical and Electronics Engineers Inc., 2014. pp. 1177-1180 (Proceedings - 2014 International Power Electronics and Application Conference and Exposition, IEEE PEAC 2014).

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title = "Design a novel nine level AC to DC multilevel inverter based on FPGA controllar",

abstract = "In this paper, a novel nine level bi-direction multilevel inverter is proposed, The structure of the main concepts for the use eleven power switch devices to divide input voltage that is replace the traditional circuit using by capacitor. Nine switches and four diodes are required to generate a nine-level output. Additional two switches and inductor will generate an output voltages balance circuit to ensure the same voltage on output capacitor. The control scheme is presented by FPGA Spartan605 evaluation kit that is produce eleven level pulse width modulation (PWM) signal pass to power switches. Nine level bi-direction multilevel major advantages for using nine-level PWM are that the voltage of each capacitor device clamping to 1/4 in the dc output voltage. Finally, a 220Vac 60Hz input voltage and 200Vdc/2kW output nine level inverter will be simulation.",

keywords = "FPGA (field programmable gate array), Multilevel inverter, Voltage balance",

author = "Wong, \{Yong Seng\} and Liu, \{Kuo Bin\} and Chen, \{Jiann Fuh\} and Liang, \{Hui Wen Rebecca\}",

note = "Publisher Copyright: {\textcopyright} 2014 IEEE.; 2014 International Power Electronics and Application Conference and Exposition, IEEE PEAC 2014 ; Conference date: 05-11-2014 Through 08-11-2014",

year = "2014",

month = feb,

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doi = "10.1109/PEAC.2014.7038027",

language = "English",

series = "Proceedings - 2014 International Power Electronics and Application Conference and Exposition, IEEE PEAC 2014",

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Wong, YS, Liu, KB, Chen, JF & Liang, HWR 2014, Design a novel nine level AC to DC multilevel inverter based on FPGA controllar. in Proceedings - 2014 International Power Electronics and Application Conference and Exposition, IEEE PEAC 2014., 7038027, Proceedings - 2014 International Power Electronics and Application Conference and Exposition, IEEE PEAC 2014, Institute of Electrical and Electronics Engineers Inc., pp. 1177-1180, 2014 International Power Electronics and Application Conference and Exposition, IEEE PEAC 2014, Shanghai, China, 5/11/14. https://doi.org/10.1109/PEAC.2014.7038027

Design a novel nine level AC to DC multilevel inverter based on FPGA controllar. / Wong, Yong Seng; Liu, Kuo Bin; Chen, Jiann Fuh et al.
Proceedings - 2014 International Power Electronics and Application Conference and Exposition, IEEE PEAC 2014. Institute of Electrical and Electronics Engineers Inc., 2014. p. 1177-1180 7038027 (Proceedings - 2014 International Power Electronics and Application Conference and Exposition, IEEE PEAC 2014).

Research output: Chapter in book / Conference proceeding › Conference article published in proceeding or book › Academic research › peer-review

TY - GEN

T1 - Design a novel nine level AC to DC multilevel inverter based on FPGA controllar

AU - Wong, Yong Seng

AU - Liu, Kuo Bin

AU - Chen, Jiann Fuh

AU - Liang, Hui Wen Rebecca

PY - 2014/2/9

Y1 - 2014/2/9

N2 - In this paper, a novel nine level bi-direction multilevel inverter is proposed, The structure of the main concepts for the use eleven power switch devices to divide input voltage that is replace the traditional circuit using by capacitor. Nine switches and four diodes are required to generate a nine-level output. Additional two switches and inductor will generate an output voltages balance circuit to ensure the same voltage on output capacitor. The control scheme is presented by FPGA Spartan605 evaluation kit that is produce eleven level pulse width modulation (PWM) signal pass to power switches. Nine level bi-direction multilevel major advantages for using nine-level PWM are that the voltage of each capacitor device clamping to 1/4 in the dc output voltage. Finally, a 220Vac 60Hz input voltage and 200Vdc/2kW output nine level inverter will be simulation.

AB - In this paper, a novel nine level bi-direction multilevel inverter is proposed, The structure of the main concepts for the use eleven power switch devices to divide input voltage that is replace the traditional circuit using by capacitor. Nine switches and four diodes are required to generate a nine-level output. Additional two switches and inductor will generate an output voltages balance circuit to ensure the same voltage on output capacitor. The control scheme is presented by FPGA Spartan605 evaluation kit that is produce eleven level pulse width modulation (PWM) signal pass to power switches. Nine level bi-direction multilevel major advantages for using nine-level PWM are that the voltage of each capacitor device clamping to 1/4 in the dc output voltage. Finally, a 220Vac 60Hz input voltage and 200Vdc/2kW output nine level inverter will be simulation.

KW - FPGA (field programmable gate array)

KW - Multilevel inverter

KW - Voltage balance

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M3 - Conference article published in proceeding or book

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SP - 1177

EP - 1180

BT - Proceedings - 2014 International Power Electronics and Application Conference and Exposition, IEEE PEAC 2014

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2014 International Power Electronics and Application Conference and Exposition, IEEE PEAC 2014

Y2 - 5 November 2014 through 8 November 2014

ER -

Wong YS, Liu KB, Chen JF, Liang HWR. Design a novel nine level AC to DC multilevel inverter based on FPGA controllar. In Proceedings - 2014 International Power Electronics and Application Conference and Exposition, IEEE PEAC 2014. Institute of Electrical and Electronics Engineers Inc. 2014. p. 1177-1180. 7038027. (Proceedings - 2014 International Power Electronics and Application Conference and Exposition, IEEE PEAC 2014). doi: 10.1109/PEAC.2014.7038027

Design a novel nine level AC to DC multilevel inverter based on FPGA controllar

Abstract

Publication series

Conference

UN SDGs

Keywords

ASJC Scopus subject areas

More information

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