Flash-based solid state drives (SSDs) are becoming popular as the storage media in recent years. In SSDs, translation pages normally store the address mapping information for data blocks. With the increasing capacity of SSDs, the management of translation pages is becoming a critical issue. In this paper, we present Data-Assemblage, a translation-page-aware data block allocation strategy for demand-based page-level address mappings in flash-based SSDs. Data-Assemblage is motivated by two observations: First, the translation page copy operations during garbage collection may significantly degrade the system performance. Second, the allocation of data blocks will directly impact the update operations in translation pages. By assembling write requests that share the same translation page into one data block, Data-Assemblage significantly reduces the page copies of translation pages and improves the average response time while retaining its space utilization and RAM cost. We evaluate Data-Assemblage using a set of benchmarks from both real-world and synthetic traces. Experimental results show that our scheme can achieve a 90.92 % reduction in the extra translation overhead and improve system performance by 22.14 % compared with the previous work.
- Flash translation layer
- Flash-based solid state drives
- Page allocation
ASJC Scopus subject areas
- Hardware and Architecture