Dark silicon-aware hardware-software collaborated design for heterogeneous many-core systems

Lei Yang; Weichen Liu; Nan Guan; Mengquan Li; Peng Chen; Edwin H.M. Sha

doi:10.1109/ASPDAC.2017.7858371

Dark silicon-aware hardware-software collaborated design for heterogeneous many-core systems

Lei Yang, Weichen Liu, Nan Guan, Mengquan Li, Peng Chen, Edwin H.M. Sha

Research output: Chapter in book / Conference proceeding › Conference article published in proceeding or book › Academic research › peer-review

11 Citations (Scopus)

Abstract

ARM's big. LITTLE architecture coupled with Heterogeneous Multi-Processing (HMP) has enabled energy-efficient solutions in the dark silicon era. System-level techniques activate nonadjacent cores to eliminate chip thermal hotspot. However, it unexpectedly increases communication delay due to longer distance in network architectures, and in turn degrades application performance and system energy efficiency. In this paper, we present a novel hierarchical hardware-software collaborated approach to address the performance/temperature conflict in dark silicon many-core systems. Optimizations on interprocessor communication, application performance, chip temperature and energy consumption are well isolated and addressed in different phases. Evaluation results show that on average 22.57% reduction of communication latency, 23.04% improvement on energy efficiency and 6.11°C reduction of chip peak temperature are achieved compared with state-of-the-art techniques.

Original language	English
Title of host publication	2017 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017
Publisher	IEEE
Pages	494-499
Number of pages	6
ISBN (Electronic)	9781509015580
DOIs	https://doi.org/10.1109/ASPDAC.2017.7858371
Publication status	Published - 16 Feb 2017
Event	22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017 - Chiba, Japan Duration: 16 Jan 2017 → 19 Jan 2017

Conference

Conference	22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017
Country/Territory	Japan
City	Chiba
Period	16/01/17 → 19/01/17

ASJC Scopus subject areas

Electrical and Electronic Engineering
Computer Science Applications
Computer Graphics and Computer-Aided Design

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1109/ASPDAC.2017.7858371

Cite this

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title = "Dark silicon-aware hardware-software collaborated design for heterogeneous many-core systems",

abstract = "ARM's big. LITTLE architecture coupled with Heterogeneous Multi-Processing (HMP) has enabled energy-efficient solutions in the dark silicon era. System-level techniques activate nonadjacent cores to eliminate chip thermal hotspot. However, it unexpectedly increases communication delay due to longer distance in network architectures, and in turn degrades application performance and system energy efficiency. In this paper, we present a novel hierarchical hardware-software collaborated approach to address the performance/temperature conflict in dark silicon many-core systems. Optimizations on interprocessor communication, application performance, chip temperature and energy consumption are well isolated and addressed in different phases. Evaluation results show that on average 22.57% reduction of communication latency, 23.04% improvement on energy efficiency and 6.11°C reduction of chip peak temperature are achieved compared with state-of-the-art techniques.",

author = "Lei Yang and Weichen Liu and Nan Guan and Mengquan Li and Peng Chen and Sha, {Edwin H.M.}",

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Yang, L, Liu, W, Guan, N, Li, M, Chen, P & Sha, EHM 2017, Dark silicon-aware hardware-software collaborated design for heterogeneous many-core systems. in 2017 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017., 7858371, IEEE, pp. 494-499, 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017, Chiba, Japan, 16/01/17. https://doi.org/10.1109/ASPDAC.2017.7858371

Dark silicon-aware hardware-software collaborated design for heterogeneous many-core systems. / Yang, Lei; Liu, Weichen; Guan, Nan et al.
2017 22nd Asia and South Pacific Design Automation Conference, ASP-DAC 2017. IEEE, 2017. p. 494-499 7858371.

Research output: Chapter in book / Conference proceeding › Conference article published in proceeding or book › Academic research › peer-review

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AB - ARM's big. LITTLE architecture coupled with Heterogeneous Multi-Processing (HMP) has enabled energy-efficient solutions in the dark silicon era. System-level techniques activate nonadjacent cores to eliminate chip thermal hotspot. However, it unexpectedly increases communication delay due to longer distance in network architectures, and in turn degrades application performance and system energy efficiency. In this paper, we present a novel hierarchical hardware-software collaborated approach to address the performance/temperature conflict in dark silicon many-core systems. Optimizations on interprocessor communication, application performance, chip temperature and energy consumption are well isolated and addressed in different phases. Evaluation results show that on average 22.57% reduction of communication latency, 23.04% improvement on energy efficiency and 6.11°C reduction of chip peak temperature are achieved compared with state-of-the-art techniques.

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Dark silicon-aware hardware-software collaborated design for heterogeneous many-core systems

Abstract

Conference

ASJC Scopus subject areas

UN SDGs

More information

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