Abstract
SIMD execution is in no doubt an efficient way to exploit the data level parallelism in image and video applications. However, SIMD execution bottlenecks must be tackled to achieve high execution efficiency. While video coding is the most computation intensive operation in video processing applications, we first analyze in this paper the implementation of two major kernel functions of H.264/AVC namely, SATD and subpel interpolation, in conventional SIMD architectures to identify the bottlenecks in traditional approaches. Based on the analysis results, we propose a new configurable SIMD structure that allows almost "random" register file access and slightly different operations in ALUs. The new features greatly benefit the realization of H.264/AVC kernel functions. When comparing with the conventional SIMD systems, the proposed SIMD architecture can have a further speedup of 2.1X to 4.6X when implementing H.264/AVC kernel functions.
| Original language | English |
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| Title of host publication | APSIPA ASC 2010 - Asia-Pacific Signal and Information Processing Association Annual Summit and Conference |
| Pages | 702-706 |
| Number of pages | 5 |
| Publication status | Published - 1 Dec 2010 |
| Event | 2nd Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, APSIPA ASC 2010 - Biopolis, Singapore Duration: 14 Dec 2010 → 17 Dec 2010 |
Conference
| Conference | 2nd Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, APSIPA ASC 2010 |
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| Country/Territory | Singapore |
| City | Biopolis |
| Period | 14/12/10 → 17/12/10 |
ASJC Scopus subject areas
- Computer Networks and Communications
- Information Systems