Comparison of CuPc-based organic thin-film transistors made by different dielectric structures

Copper phthalocyanine-based organic thin-film transistors (OTFTs) with gate dielectric made by different combinations of ZrO2and Al2O3are fabricated. Experimental results show that as compared to the OTFTs with ZrO2/Al2O3stacked and Al2O3/ZrO2/Al2O3sandwiched gate dielectric, the device fabricated with the Al2O3/ZrO2stacked gate dielectric manifests better electrical properties such as larger on/off ratio, smaller subthreshold slope, and higher carrier mobility. This could be explained by the fact that Al2O3has good interface properties with CuPc and can act as a barrier layer, which prevents intermixing of materials at the organic/insulator interface and can slow oxygen diffusion through Al-O matrix, thus suppressing interfacial trap density. The gate-bias stress effect on the performance of OTFTs is also investigated. It is found that the threshold voltage shifts toward positive direction with stress time under a negative gate bias voltage. Longer stress times cause more degradation of the subthreshold and on/off ratio, probably due to more defect-state creation in the channel and an increase of interfacial traps and oxide charges in the dielectric during stress. Results also indicate that OTFTs with Al2O3interlayer between the high-k dielectric and the gate electrode have less degradation in subthreshold and on/off ratio after a 3600-s stress. The involved mechanism lies in that the Al2O3interlayer at the high-k dielectric/gate electrode interface can effectively block the injection of electrons from the gate electrode into the high-k material during electrical stress and thus less stress-induced interfacial traps and negative oxide charges in the devices. The electrical characteristics of the OTFTs after the removal of gate bias for a period of time are also studied.