ARMISS: An instruction set simulator for the ARM architecture

Mingsong Lv; Qingxu Deng; Nan Guan; Yarning Xie; Ge Yu

doi:10.1109/ICESS.2008.73

ARMISS: An instruction set simulator for the ARM architecture

Mingsong Lv, Qingxu Deng, Nan Guan, Yarning Xie, Ge Yu

Research output: Chapter in book / Conference proceeding › Conference article published in proceeding or book › Academic research › peer-review

5 Citations (Scopus)

Abstract

The development efficiency of embedded systems is highly pressured due to the pursuit of short time-to-market of embedded products. In traditional design flow, although software can be developed in parallel with the hardware platform, it can only be tested and verified after the platform is fabricated. ARMISS, an Instruction Set Simulator for the ARM architecture, is developed to enable early software testing and verification. The ARM instruction set, MMU and interrupt handling are emulated in this tool. An instruction caching technique is designed to accelerate the interpretation-based instruction emulation. ARMISS is implemented in the C programming language, thus is highly portable across varies host operating systems for embedded system design.

Original language	English
Title of host publication	Proceedings of The International Conference on Embedded Software and Systems, ICESS 2008q
Pages	548-555
Number of pages	8
DOIs	https://doi.org/10.1109/ICESS.2008.73
Publication status	Published - 22 Sept 2008
Externally published	Yes
Event	2008 International Conference on Embedded Software and Systems, ICESS-08 - Chengdu, Sichuan, China Duration: 29 Jul 2008 → 31 Jul 2008

Conference

Conference	2008 International Conference on Embedded Software and Systems, ICESS-08
Country/Territory	China
City	Chengdu, Sichuan
Period	29/07/08 → 31/07/08

ASJC Scopus subject areas

Hardware and Architecture
Software

More information

10.1109/ICESS.2008.73

Cite this

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title = "ARMISS: An instruction set simulator for the ARM architecture",

abstract = "The development efficiency of embedded systems is highly pressured due to the pursuit of short time-to-market of embedded products. In traditional design flow, although software can be developed in parallel with the hardware platform, it can only be tested and verified after the platform is fabricated. ARMISS, an Instruction Set Simulator for the ARM architecture, is developed to enable early software testing and verification. The ARM instruction set, MMU and interrupt handling are emulated in this tool. An instruction caching technique is designed to accelerate the interpretation-based instruction emulation. ARMISS is implemented in the C programming language, thus is highly portable across varies host operating systems for embedded system design.",

author = "Mingsong Lv and Qingxu Deng and Nan Guan and Yarning Xie and Ge Yu",

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doi = "10.1109/ICESS.2008.73",

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Lv, M, Deng, Q, Guan, N, Xie, Y & Yu, G 2008, ARMISS: An instruction set simulator for the ARM architecture. in Proceedings of The International Conference on Embedded Software and Systems, ICESS 2008q., 4595609, pp. 548-555, 2008 International Conference on Embedded Software and Systems, ICESS-08, Chengdu, Sichuan, China, 29/07/08. https://doi.org/10.1109/ICESS.2008.73

ARMISS: An instruction set simulator for the ARM architecture. / Lv, Mingsong; Deng, Qingxu; Guan, Nan et al.
Proceedings of The International Conference on Embedded Software and Systems, ICESS 2008q. 2008. p. 548-555 4595609.

Research output: Chapter in book / Conference proceeding › Conference article published in proceeding or book › Academic research › peer-review

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ARMISS: An instruction set simulator for the ARM architecture

Abstract

Conference

ASJC Scopus subject areas

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