An endurance-enhanced flash translation layer via reuse for NAND flash memory storage systems

Yi Wang, Duo Liu, Zhiwei Qin, Zili Shao

Research output: Chapter in book / Conference proceedingConference article published in proceeding or bookAcademic researchpeer-review

19 Citations (Scopus)

Abstract

NAND flash memory is widely used in embedded systems due to its non-volatility, shock resistance and high cell density. In recent years, various Flash Translation Layer (FTL) schemes (especially hybrid-level FTL schemes) have been proposed. Although these FTL schemes provide good solutions in terms of endurance and wear-leveling, none of them have considered to reuse free pages in both data blocks and log blocks during a merge operation. By reusing these free pages, less free blocks are needed and the endurance of NAND flash memory is enhanced. We evaluate our reuse strategy using a variety of application specific I/O traces from Windows systems. Experimental results show that the proposed scheme can effectively reduce the erase counts and enhance the endurance of flash memory.
Original languageEnglish
Title of host publicationProceedings - Design, Automation and Test in Europe Conference and Exhibition, DATE 2011
Pages14-19
Number of pages6
Publication statusPublished - 31 May 2011
Event14th Design, Automation and Test in Europe Conference and Exhibition, DATE 2011 - Grenoble, France
Duration: 14 Mar 201118 Mar 2011

Conference

Conference14th Design, Automation and Test in Europe Conference and Exhibition, DATE 2011
CountryFrance
CityGrenoble
Period14/03/1118/03/11

ASJC Scopus subject areas

  • Engineering(all)

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