An ASIC design of a high-speed clock and data recovery circuit

C.W. Ng; K.H. Yu; C.W. Sham; Chi Kong Tse

An ASIC design of a high-speed clock and data recovery circuit

C.W. Ng
, K.H. Yu
, C.W. Sham
, Chi Kong Tse

The Hong Kong Polytechnic University

Research output: Unpublished conference presentation (presented paper, abstract, poster) › Conference presentation (not published in journal/proceeding/book) › Academic research › peer-review

Original language	English
Pages	1-6
Number of pages	6
Publication status	Published - 2011
Event	International Conference on Electronics and Information Engineering [ICEIE] - Duration: 1 Jan 2011 → …

Conference

Conference	International Conference on Electronics and Information Engineering [ICEIE]
Period	1/01/11 → …

Cite this

@conference{99a097d66dd142dcaa897b012b9efb31,

title = "An ASIC design of a high-speed clock and data recovery circuit",

author = "C.W. Ng and K.H. Yu and C.W. Sham and Tse, \{Chi Kong\}",

year = "2011",

language = "English",

pages = "1--6",

note = "International Conference on Electronics and Information Engineering [ICEIE] ; Conference date: 01-01-2011",

}

An ASIC design of a high-speed clock and data recovery circuit. / Ng, C.W.; Yu, K.H.; Sham, C.W. et al.
2011. 1-6 Paper presented at International Conference on Electronics and Information Engineering [ICEIE].

Research output: Unpublished conference presentation (presented paper, abstract, poster) › Conference presentation (not published in journal/proceeding/book) › Academic research › peer-review