An air spacer technology for improving short-channel immunity of MOSFETs with raised source/drain and high-κ gate dielectric

Chunshan Yin, Philip Ching Ho Chan, Mansun Chan

Research output: Journal article publicationJournal articleAcademic researchpeer-review

19 Citations (Scopus)


An air-spacer technology with raised source/drain (S/D) for ultrathin-body (UTB) silicon-on-insulator MOSFETs is developed. The results show that the poly raised S/D can effectively reduce the series resistance and the air spacer can effectively reduce the fringing capacitance. The air spacer is particularly useful when combined with high-K gate dielectric. The improved device characteristics are demonstrated experimentally and by extensive two-dimensional device simulation.
Original languageEnglish
Pages (from-to)323-325
Number of pages3
JournalIEEE Electron Device Letters
Issue number5
Publication statusPublished - 1 May 2005
Externally publishedYes


  • Air spacer
  • Gate insulator
  • High-κ dielectric
  • Raised source/drain (S/D)
  • Silicon-on-insulator (SOI)
  • Ultrathinbody (UTB)

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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