Adaptive high-bandwidth digitally controlled buck converter with improved line and load transient response

Albert T.L. Lee, Johnny K.O. Sin, Philip Ching Ho Chan

Research output: Journal article publicationJournal articleAcademic researchpeer-review

14 Citations (Scopus)

Abstract

Digitally controlled switching converter suffers from bandwidth limitation because of the additional phase delay in the digital feedback control loop. To overcome the bandwidth limitation without using a high sampling rate, this study presents an adaptive third-order digital controller for regulating a voltage-mode buck converter with a modest 2× oversampling ratio. The phase lag because of the analogue-to-digital converter (ADC) conversion time delay is virtually compensated by providing an early estimation of the error voltage for the next sampling time instant, enabling a higher unity-gain bandwidth without compromising stability. An additional pair of low-frequency pole and zero in the third-order controller increases the lowfrequency gain, resulting in faster settling time and smaller output voltage deviation during line transient. Both simulation and experimental results demonstrate that the proposed adaptive third-order controller reduces the settling time by 50% in response to a 1 V line transient and 30% in response to a 600 mA load transient, compared to the baseline static second-order controller. The fastest settling time is measured to be about 11.70 μs, surpassing the transient performance of conventional digital controllers and approaching that of the state-of-the-art analogue-based controllers.
Original languageEnglish
Pages (from-to)515-526
Number of pages12
JournalIET Power Electronics
Volume7
Issue number3
DOIs
Publication statusPublished - 1 Jan 2014

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this