A compact submicrometer Fully Depleted SiliconOnInsulator (FDSOI) and Nearly FDSOI MOSFET device model suitable for analog as well as digital application has been proposed. It is an all region model. In developing this model care has been taken in retaining the basic functional form of physical models while improving the model accuracy and computational efficiency. In addition to the commonly included effects in the FDSOI MOSFET model, we have given careful consideration to parasitic source/drain resistance, Drain Induced Conductivity Enhancement (DICE) effect, floating body effect, selfheating and model continuity. A single parameter set is used for a large set of device dimensions except threshold voltage and parasitic source/drain resistance due to silicon film thickness variations. The accuracy of the model is validated with experimental data using NMOS FDSOI devices and found to be in good agreement.
|Number of pages||1|
|Journal||IEEE Transactions on Electron Devices|
|Publication status||Published - 1 Dec 1996|
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering