A physical thermal noise model for SOI MOSFET

Wei Jin; Philip Ching Ho Chan; Jack Lau

doi:10.1109/16.830992

A physical thermal noise model for SOI MOSFET

Wei Jin, Philip Ching Ho Chan, Jack Lau

Research output: Journal article publication › Journal article › Academic research › peer-review

37 Citations (Scopus)

Abstract

The recent progress in SOI technology necessitates an accurate thermal noise model for wide-band SOI analog 1C design. In this paper a physical-based thermal noise model is proposed for floating-body SOI MOSFET operated in strong inversion regime and verified by the experimental data. In the model, both the lattice temperature (unique to SOI due to the buried oxide) and the carrier temperature (significant for short-channel device in saturation region) are considered. The model agrees well with the experimental data.

Original language	English
Pages (from-to)	768-773
Number of pages	6
Journal	IEEE Transactions on Electron Devices
Volume	47
Issue number	4
DOIs	https://doi.org/10.1109/16.830992
Publication status	Published - 1 Dec 2000
Externally published	Yes

Keywords

Carrier temperature
Lattice temperature
Mosfet model
SOI MOSFET
Thermal noise

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/16.830992

Cite this

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KW - Mosfet model

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KW - Thermal noise

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A physical thermal noise model for SOI MOSFET

Abstract

Keywords

ASJC Scopus subject areas

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