A novel pipeline design for the realization of the prime factor FFT

Daniel Pak Kong Lun, Wan Chi Siu

Research output: Chapter in book / Conference proceedingConference article published in proceeding or bookAcademic researchpeer-review

5 Citations (Scopus)

Abstract

In this paper, an extremely efficient pipeline architecture is proposed for the realization of the prime factor algorithm (PFA). By using the extended diagonal feature of the Chinese Remainder Theorem (CRT) mapping, we show that the data transactions during the computation can be efficiently carried out with the simplest control strategy. Due to this reason, the present approach has the least hardware requirement as compared to the previous propositions. Furthermore, in the case of multi-dimensional PFA computation, it does not require the computation to be split up into a number of two-dimensional ones. Consequently, the overhead which is required for data loading and data retrieval in each two-dimensional stage can be saved. In fact, all these savings are achieved by only using one more connection link which connects all the memory buffers via the extended diagonal of a multi-dimensional array.

Original languageEnglish
Title of host publication1992 IEEE International Symposium on Circuits and Systems, ISCAS 1992
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages160-163
Number of pages4
ISBN (Electronic)0780305930
DOIs
Publication statusPublished - 10 May 1992
Event1992 IEEE International Symposium on Circuits and Systems, ISCAS 1992 - San Diego, United States
Duration: 10 May 199213 May 1992

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume1
ISSN (Print)0271-4310

Conference

Conference1992 IEEE International Symposium on Circuits and Systems, ISCAS 1992
CountryUnited States
CitySan Diego
Period10/05/9213/05/92

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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